LITTLETON, MA — May 19, 2011— CLK Design Automation Inc., the leader in high accuracy timing solutions for nanometer digital IC design, today announced that Matthew Raggett has joined its executive team as Vice President Field Operations and Business Development. Mr. Raggett will be responsible for strengthening the company’s worldwide sales and support capabilities, and to drive new business relationships in the industry.
“I am truly excited to have Matthew join our team” said Isadore Katz, President and CEO of CLK Design Automation. “Matthew is a proven leader in the EDA industry. His wealth of experience in taking start-ups to the next level will be essential for CLK as we continue to grow and expand.”
“CLK is delivering the kinds of innovative solutions that are essential for 40 and 28 nanometer IC design,” Mr. Raggett said. “These products are proving themselves in production, and this is an excellent opportunity to grow great technology into a great company.”
Prior to joining CLK, Matthew most recently was Chairman of Javelin Design Automation. Prior to that, he was President and CEO of Analog Design Automation, which was acquired by Synopsys in 2004, and was VP Field Operations at Insilicon which was also acquired by Synopsys. Matthew held executive positions at Cadence, National Semiconductor and Fairchild Semiconductor.
About CLK Design Automation
CLK Design Automation is the leader in high accuracy timing solutions – helping leading edge semiconductor companies solve their most pressing timing and manufacturing challenges at 40 and 28nm. CLK DA’s high accuracy timing technology – the FX Model, the Amber Timing Engine, and the FX Variance Solver – delivers full chip capacity, SPICE accuracy, and unprecedented performance: variance analysis 1 million times faster than Monte Carlo SPICE and path delay and crosstalk analysis 10,000 times faster than SPICE.
CLK Design Automation’s products include AOCV FX for full library AOCV tables in days compared to weeks and months, Path FX for fast delay and variance analysis for critical paths and block timing characterization, Signal FX for SPICE accurate crosstalk analysis, and Silicon Debug to identify variation sensitive critical paths and cells.