Announcing Amber™ FX Transistor SSTA

in the TSMC’s Reference Flow 9.0

Amber™ FX Transistor SSTA product is a transistor statistical static timing analysis (TSSTA) for TSMC’s Reference Flow 9.0 to lower design obstacles, improve design margins, and increase 40-nanometer (nm) technology yields and delivers near SPICE accuracy for timing delay and process variance based on TSMC’s advanced manufacturing models. (more...)

Amber™ FX Transistor STA is a cell based transistor static timing analyzer that delivers near SPICE accuracy combined with the threaded performance and capacity of the Amber™ Static Analysis tool suite. Amber FX uses a fast transistor model, FXM, which is accurate to within 2% of SPICE. This model addresses many of the known accuracy and characterization problems found in other models such as the non-linear delay (NLDM), current composite source (CCS) and effective current source (ECS) models. (more...)

Statistical timing analysis moves from interesting to necessary

EDN – June 6, 2008

TSMC's inclusion of SSTA in its new reference flow signals the mainstream arrival of the technology.
By Ron Wilson, Executive Editor --

Statistical static timing analysis (SSTA)—theory, thesis project, IBM proprietary technology—is about to add one more stage to its evolution: mainstream member of the design flow. For some time now IBM has required the use of its statistical tool, EinsTimer, in the signoff process for its ASIC customers. But other members of the Common Platform Alliance, despite sharing processes, have not done the same. So despite the emergence of tools from startups, statistical timing has remained a peripheral issue in the design flow.

Now, in its announcement of Reference Flow 9.0 this week, TSMC has included two different SSTA tools, both from small EDA companies. If the industry needed a signal that the day of statistical timing has arrived, there it is. (more... )

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